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In-Memory Processing
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#	Item
21	Brief Announcement: Selfishness in Transactional Memory Raphael Eidenbenz Roger Wattenhofer Computer Engineering and Networks Lab Add to Reading List Source URL: www.tik.ee.ethz.ch Language: English - Date: 2015-05-18 12:16:37 Concurrency control Computing Transaction processing Data management Software Software transactional memory Transactional memory Linearizability Lock Thread Concurrent data structure Non-blocking algorithm
22	Accelerating Two-Dimensional Page Walks for Virtualized Systems Ravi Bhargava Computing Solutions Group Advanced Micro Devices Austin, TX Add to Reading List Source URL: vglab.cse.iitd.ac.in Language: English - Date: 2011-07-25 05:59:26 Computer hardware Computing Computer architecture Memory management Central processing unit Virtual memory Computer memory Hardware virtualization Translation lookaside buffer Page table Second Level Address Translation CPU cache
23	TxLinux: Using and Managing Hardware Transactional Memory in an Operating System Christopher J. Rossbach, Owen S. Hofmann, Donald E. Porter, Hany E. Ramadan, Aditya Bhandari, and Emmett Witchel Department of Computer Sci Add to Reading List Source URL: www.sosp2007.org Language: English - Date: 2016-06-15 13:09:51 Concurrency control Computing Transaction processing Software Data management Software transactional memory Lock Transactional memory Linearizability Synchronization Thread Spinlock
24	Multi-versioning in Transactional Memory Idit Keidar1 and Dmitri Perelman2 1 Technion, Israel Institute of Technology Add to Reading List Source URL: webee.technion.ac.il Language: English - Date: 2016-04-24 10:02:05 Transaction processing Computing Data management Data Concurrency control Databases Schedule Multiversion concurrency control Transactional memory Serializability Database transaction Dynamic data
25	Transactional IPC in Fiasco.OC Can we get the multicore case verified for free? Till Smejkal, Adam Lackorzynski, Benjamin Engel and Marcus Völp Operating Systems Group Technische Universität Dresden, Germany Add to Reading List Source URL: www.mpi-sws.org Language: English - Date: 2016-07-14 16:23:27 Computing Computer architecture Concurrency control Software Transaction processing Transactional memory Microkernel Software transactional memory Transactional Synchronization Extensions L4 microkernel family Rock Mach
26	Journal of Memory and Language 40, 263–Article ID jmla, available online at http://www.idealibrary.com on Disambiguation Preferences in Noun Phrase Conjunction Do Not Mirror Corpus Frequency Edward Add to Reading List Source URL: tedlab.mit.edu Language: English - Date: 2012-08-09 14:59:10 Human development Interpersonal relationships Psychoanalysis Attachment theory Philosophy of love Sentence processing Syntactic ambiguity
27	Reducing contention in STM Panagiota Fatourou Department of Computer Science University of Crete & FORTH ICS Mykhailo Iaremko1 Add to Reading List Source URL: rp-www.cs.usyd.edu.au Language: English Concurrency control Transaction processing Software transactional memory Lock Non-blocking algorithm Linearizability Transactional memory Parallel computing Go Synchronization Symposium on Parallelism in Algorithms and Architectures
28	A Formal Model of Crash Recovery in Distributed Software Transactional Memory (Extended Abstract) Paweł T. Wojciechowski, Jan Kończak Poznań University of TechnologyPoznań, Poland Add to Reading List Source URL: rp-www.cs.usyd.edu.au Language: English Transaction processing Fault-tolerant computer systems Data management Concurrency control Databases Paxos Replication Software transactional memory State machine replication Consensus Database transaction Transactional memory
29	1 Optimal Tile Size Selection Guided by Analytical Models∗ Basilio B. Fraguelaa , Mart´ın G. Carmuejaa , Diego Andradea a Add to Reading List Source URL: www.des.udc.es Language: English - Date: 2005-09-23 06:13:05 Cache Computer architecture Computer memory Central processing unit CPU cache Optimizing compiler Memory hierarchy Genetic algorithm Program optimization Algorithm Itanium Cache-oblivious algorithm
30	Contributions of Processing Fluency to Repetition Effects in Masked Word Identification MICHAEL EJ. MASSON University of Victoria COLIN M. MACLEOD University of Toronto, Scarborough Campus Abstract Prior exposure to a w Add to Reading List Source URL: web.uvic.ca Language: English - Date: 2008-07-09 00:17:14 Recall Memory Two-alternative forced choice Perception

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